N/APosted on - 07/28/2011
Does the PCI bridge device use prefetch for PCI MRM and MRL? Is prefetch a dynamic or static assignment to address regions or pages? Does the bridge device have any priority requester capability, that is, favor a PCI requester or host memory region?
Does The Bridge Device Have Any Priority Requester Capability
A Peripheral Component Interconnect (PCI) bridge between two buses prefetches read data into a cache. The number of cache lines to prefetch is predicted by a prefetch counter. One prefetch counter is kept for each type of memory-read command: basic-memory read, memory-read-line that reads a cache line, and memory-read-multiple that reads multiple cache lines. For each type of read command, counters are kept of the number of completed commands, bus disconnects (indicating under-fetch), and master-discard of data (indicating over-fetch). After a predetermined number of execution of each type of command, the command's prefetch counter is incremented if under-fetching occured, or decremented if over-fetching occured, as indicated
by the disconnect and discard counters for that type of read command. The command's other counters are reset. Prefetching
is optimized for each type of read command. MRM can prefetch more data than MRL or MR.
There 2 kinds of configuration prefetching techniques: static and dynamic prefetching. In static partitioning, regions are either cached or uncached, and the "cache/not-cache" designation for a particular item does not change over time.In dynamic the cache/not-cache decision for a particular item can change over tume and is typically made at run time in response to application
A bridge that has prefetched memory read data for a requester must discard any prefetched read data that the requester doesnt
actually end up reading.