N/APosted on - 06/15/2012
I'm getting the following error as I try to do so.
I tried to create a testbench includes a transducer written in VHDL-AMS and some standard components By analogLib. I get the error in this point; I try Netlist and run a transient solution.
ncvlog: *E,DLPAKW: Attempt to write connect connectLib.ConnRules_18V_full_fast:connect (VST) into a read-only library.
Please somebody give me a correct solution.
VHDL-AMS compile error Need Solution
This error particularly indicates that the installation of IUS or INCISIVE is not well-configured. Therefore, you are required to add the path given below to cds.lib.
ASSIGN AllLibs TmpRootDir path
path mention above is the path to an editable directory , which is occasionally under your running directory. This will enable the acquisition of read-only stuff to get into the directory.
If you to wish make it precisely, you may use
ASSIGN connectLib TMP path
Thus, this will be executed for connectLib solely.